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author | BALATON Zoltan via | 2021-01-03 02:09:33 +0100 |
---|---|---|
committer | David Gibson | 2021-01-06 01:09:59 +0100 |
commit | 2d4c816a8dcfb0d38712c3ffed5f5fcaedd7fe40 (patch) | |
tree | dfb6315cf8b59a76334a7dc0e841a4fab91a8150 /hw/ppc/trace-events | |
parent | ppc440_pcix: Improve comment for IRQ mapping (diff) | |
download | qemu-2d4c816a8dcfb0d38712c3ffed5f5fcaedd7fe40.tar.gz qemu-2d4c816a8dcfb0d38712c3ffed5f5fcaedd7fe40.tar.xz qemu-2d4c816a8dcfb0d38712c3ffed5f5fcaedd7fe40.zip |
ppc440_pcix: Fix register write trace event
The trace event for pci_host_config_write() was also using the trace
event for read. Add corresponding trace and correct this.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <a6c7dcf7153cc537123ed8ceac060f2f64a883cb.1609636173.git.balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/ppc/trace-events')
-rw-r--r-- | hw/ppc/trace-events | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/ppc/trace-events b/hw/ppc/trace-events index 6d8d095aa2..1e91984526 100644 --- a/hw/ppc/trace-events +++ b/hw/ppc/trace-events @@ -96,3 +96,4 @@ ppc440_pcix_set_irq(int irq_num) "PCI irq %d" ppc440_pcix_update_pim(int idx, uint64_t size, uint64_t la) "Added window %d of size=0x%" PRIx64 " to CPU=0x%" PRIx64 ppc440_pcix_update_pom(int idx, uint32_t size, uint64_t la, uint64_t pcia) "Added window %d of size=0x%x from CPU=0x%" PRIx64 " to PCI=0x%" PRIx64 ppc440_pcix_reg_read(uint64_t addr, uint32_t val) "addr 0x%" PRIx64 " = 0x%" PRIx32 +ppc440_pcix_reg_write(uint64_t addr, uint32_t val, uint32_t size) "addr 0x%" PRIx64 " = 0x%" PRIx32 " size 0x%" PRIx32 |