diff options
| author | Alexander Graf | 2012-02-21 19:41:59 +0100 |
|---|---|---|
| committer | Andreas Färber | 2012-03-14 22:20:24 +0100 |
| commit | fc0b2c0f1a8eb679d28763832f3223259bf37b34 (patch) | |
| tree | 405c22ba39983f138505e7da42be118019dd9acb /hw/ppc405_uc.c | |
| parent | qom: Introduce object_class_get_list() (diff) | |
| download | qemu-fc0b2c0f1a8eb679d28763832f3223259bf37b34.tar.gz qemu-fc0b2c0f1a8eb679d28763832f3223259bf37b34.tar.xz qemu-fc0b2c0f1a8eb679d28763832f3223259bf37b34.zip | |
PPC: 405: Use proper CPU reset
On ppc405ep there is a register that allows for software to reset the
core, but not the whole system. Implement this reset using a reset
interrupt.
This gets rid of a bunch of #if 0'ed code.
Reported-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/ppc405_uc.c')
| -rw-r--r-- | hw/ppc405_uc.c | 16 |
1 files changed, 2 insertions, 14 deletions
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c index 98079fa23f..951b389c4c 100644 --- a/hw/ppc405_uc.c +++ b/hw/ppc405_uc.c @@ -1769,13 +1769,7 @@ void ppc40x_core_reset (CPUState *env) target_ulong dbsr; printf("Reset PowerPC core\n"); - env->interrupt_request |= CPU_INTERRUPT_EXITTB; - /* XXX: TOFIX */ -#if 0 - cpu_reset(env); -#else - qemu_system_reset_request(); -#endif + cpu_interrupt(env, CPU_INTERRUPT_RESET); dbsr = env->spr[SPR_40x_DBSR]; dbsr &= ~0x00000300; dbsr |= 0x00000100; @@ -1787,13 +1781,7 @@ void ppc40x_chip_reset (CPUState *env) target_ulong dbsr; printf("Reset PowerPC chip\n"); - env->interrupt_request |= CPU_INTERRUPT_EXITTB; - /* XXX: TOFIX */ -#if 0 - cpu_reset(env); -#else - qemu_system_reset_request(); -#endif + cpu_interrupt(env, CPU_INTERRUPT_RESET); /* XXX: TODO reset all internal peripherals */ dbsr = env->spr[SPR_40x_DBSR]; dbsr &= ~0x00000300; |