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author | Andreas Färber | 2012-12-17 06:18:02 +0100 |
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committer | Andreas Färber | 2013-01-15 04:09:13 +0100 |
commit | 55e5c2850293547203874098f7cec148ffd12dfa (patch) | |
tree | f9a9cc316999b7b52726b5186a925022b3747daa /hw/ppce500_spin.c | |
parent | cpu: Move numa_node field to CPUState (diff) | |
download | qemu-55e5c2850293547203874098f7cec148ffd12dfa.tar.gz qemu-55e5c2850293547203874098f7cec148ffd12dfa.tar.xz qemu-55e5c2850293547203874098f7cec148ffd12dfa.zip |
cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using a
negative offset. Therefore the field is placed last in CPUState.
Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.
Move common parts of mips cpu_state_reset() to mips_cpu_reset().
Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
[AF: Rebased onto ppc CPU subclasses and openpic changes]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/ppce500_spin.c')
-rw-r--r-- | hw/ppce500_spin.c | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/hw/ppce500_spin.c b/hw/ppce500_spin.c index 1b2c34f92c..4c206e2834 100644 --- a/hw/ppce500_spin.c +++ b/hw/ppce500_spin.c @@ -124,21 +124,23 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value, SpinState *s = opaque; int env_idx = addr / sizeof(SpinInfo); CPUPPCState *env; + CPUState *cpu = NULL; SpinInfo *curspin = &s->spin[env_idx]; uint8_t *curspin_p = (uint8_t*)curspin; for (env = first_cpu; env != NULL; env = env->next_cpu) { - if (env->cpu_index == env_idx) { + cpu = CPU(ppc_env_get_cpu(env)); + if (cpu->cpu_index == env_idx) { break; } } - if (!env) { + if (cpu == NULL) { /* Unknown CPU */ return; } - if (!env->cpu_index) { + if (cpu->cpu_index == 0) { /* primary CPU doesn't spin */ return; } |