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authorBlue Swirl2010-09-18 07:53:15 +0200
committerBlue Swirl2010-09-18 07:53:15 +0200
commit7d1476898fd58d6ae5c054e6afddf18c335d9d89 (patch)
treef6e3a228574429a312d55efcdbdb68b1e5907dd1 /hw/pxa2xx.c
parentMIPS: fix yield handling (diff)
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pxa2xx: fix SSSR TFN logic
Fix SSSR TFN logic: TX FIFO is never filled, so it is always in underrun condition if SSP is enabled. This also avoids a gcc warning with -Wtype-limits. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/pxa2xx.c')
-rw-r--r--hw/pxa2xx.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index faa3d9589a..88f61c069e 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -636,6 +636,7 @@ static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
{
s->sssr &= ~(0xf << 12); /* Clear RFL */
s->sssr &= ~(0xf << 8); /* Clear TFL */
+ s->sssr &= ~SSSR_TFS;
s->sssr &= ~SSSR_TNF;
if (s->enable) {
s->sssr |= ((s->rx_level - 1) & 0xf) << 12;
@@ -643,14 +644,13 @@ static void pxa2xx_ssp_fifo_update(PXA2xxSSPState *s)
s->sssr |= SSSR_RFS;
else
s->sssr &= ~SSSR_RFS;
- if (0 <= SSCR1_TFT(s->sscr[1]))
- s->sssr |= SSSR_TFS;
- else
- s->sssr &= ~SSSR_TFS;
if (s->rx_level)
s->sssr |= SSSR_RNE;
else
s->sssr &= ~SSSR_RNE;
+ /* TX FIFO is never filled, so it is always in underrun
+ condition if SSP is enabled */
+ s->sssr |= SSSR_TFS;
s->sssr |= SSSR_TNF;
}