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authorbalrog2007-10-04 21:41:17 +0200
committerbalrog2007-10-04 21:41:17 +0200
commit2b76bdc965ba7b4f27133cb345101d9535ddaa79 (patch)
treef38a2f0cbac84a8efe2094f781bc0efc1485afa5 /hw/pxa2xx_gpio.c
parentWe must reset the PowerPC CPU _after_ registering it, as hardware reset (diff)
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Several corrections in the spitzkbd keymap (patch by Juergen Lock).
Don't abort on illegal GPSR reads, instead only warn. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3324 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/pxa2xx_gpio.c')
-rw-r--r--hw/pxa2xx_gpio.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c
index 85aeb50cc3..723b1c1d03 100644
--- a/hw/pxa2xx_gpio.c
+++ b/hw/pxa2xx_gpio.c
@@ -24,6 +24,7 @@ struct pxa2xx_gpio_info_s {
uint32_t rising[PXA2XX_GPIO_BANKS];
uint32_t falling[PXA2XX_GPIO_BANKS];
uint32_t status[PXA2XX_GPIO_BANKS];
+ uint32_t gpsr[PXA2XX_GPIO_BANKS];
uint32_t gafr[PXA2XX_GPIO_BANKS * 2];
uint32_t prev_level[PXA2XX_GPIO_BANKS];
@@ -152,6 +153,11 @@ static uint32_t pxa2xx_gpio_read(void *opaque, target_phys_addr_t offset)
case GPDR: /* GPIO Pin-Direction registers */
return s->dir[bank];
+ case GPSR: /* GPIO Pin-Output Set registers */
+ printf("%s: Read from a write-only register " REG_FMT "\n",
+ __FUNCTION__, offset);
+ return s->gpsr[bank]; /* Return last written value. */
+
case GRER: /* GPIO Rising-Edge Detect Enable registers */
return s->rising[bank];
@@ -201,6 +207,7 @@ static void pxa2xx_gpio_write(void *opaque,
case GPSR: /* GPIO Pin-Output Set registers */
s->olevel[bank] |= value;
pxa2xx_gpio_handler_update(s);
+ s->gpsr[bank] = value;
break;
case GPCR: /* GPIO Pin-Output Clear registers */