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author | Gerd Hoffmann | 2011-10-14 18:05:48 +0200 |
---|---|---|
committer | Gerd Hoffmann | 2012-02-28 17:20:15 +0100 |
commit | 6f2b175a090f367c3aab2226c4741b439671307a (patch) | |
tree | 156f47bfa8b9839fe159ef464770df705dd18bba /hw/qxl.h | |
parent | qxl: make qxl_render_update async (diff) | |
download | qemu-6f2b175a090f367c3aab2226c4741b439671307a.tar.gz qemu-6f2b175a090f367c3aab2226c4741b439671307a.tar.xz qemu-6f2b175a090f367c3aab2226c4741b439671307a.zip |
qxl: add optinal 64bit vram bar
This patch adds an 64bit pci bar for vram. It is turned off by default.
It can be enabled by setting the size of the 64bit bar to be larger than
the 32bit bar. Both 32bit and 64bit bar refer to the same memory. Only
the first part of the memory is available via 32bit bar.
The intention is to allow large vram sizes for 64bit guests, by allowing
the vram bar being mapped above 4G, so we don't have to squeeze it into
the pci I/O window below 4G.
With vram_size_mb=16 and vram64_size_mb=256 it looks like this:
00:02.0 VGA compatible controller: Red Hat, Inc. Device 0100 (rev 02) (prog-if 00 [VGA controller])
Subsystem: Red Hat, Inc Device 1100
Physical Slot: 2
Flags: fast devsel, IRQ 10
Memory at f8000000 (32-bit, non-prefetchable) [size=64M]
Memory at fc000000 (32-bit, non-prefetchable) [size=16M]
Memory at fd020000 (32-bit, non-prefetchable) [size=8K]
I/O ports at c5a0 [size=32]
Memory at ffe0000000 (64-bit, prefetchable) [size=256M]
Expansion ROM at fd000000 [disabled] [size=64K]
[ mapping above 4G needs patched seabios:
http://www.kraxel.org/cgit/seabios/commit/?h=pci64 ]
Diffstat (limited to 'hw/qxl.h')
-rw-r--r-- | hw/qxl.h | 7 |
1 files changed, 7 insertions, 0 deletions
@@ -16,6 +16,10 @@ enum qxl_mode { QXL_MODE_NATIVE, }; +#ifndef QXL_VRAM64_RANGE_INDEX +#define QXL_VRAM64_RANGE_INDEX 4 +#endif + #define QXL_UNDEFINED_IO UINT32_MAX #define QXL_NUM_DIRTY_RECTS 64 @@ -88,6 +92,8 @@ typedef struct PCIQXLDevice { /* vram pci bar */ uint32_t vram_size; MemoryRegion vram_bar; + uint32_t vram32_size; + MemoryRegion vram32_bar; /* io bar */ MemoryRegion io_bar; @@ -95,6 +101,7 @@ typedef struct PCIQXLDevice { /* user-friendly properties (in megabytes) */ uint32_t ram_size_mb; uint32_t vram_size_mb; + uint32_t vram32_size_mb; /* qxl_render_update state */ int render_update_cookie_num; |