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authorAlistair Francis2019-10-09 01:32:29 +0200
committerPalmer Dabbelt2019-10-28 15:47:28 +0100
commit2738b3b555efaf206b814677966e8e3510c64a8a (patch)
treebc523213b451740092735ae4254ec8b7d8d54c6f /hw/riscv/virt.c
parentriscv/virt: Add the PFlash CFI01 device (diff)
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riscv/virt: Jump to pflash if specified
If the user supplied pflash to QEMU then change the reset code to jump to the pflash base address instead of the DRAM base address. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/riscv/virt.c')
-rw-r--r--hw/riscv/virt.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index b2156abd6c..cc8f311e6b 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -443,6 +443,7 @@ static void riscv_virt_board_init(MachineState *machine)
MemoryRegion *mask_rom = g_new(MemoryRegion, 1);
char *plic_hart_config;
size_t plic_hart_config_len;
+ target_ulong start_addr = memmap[VIRT_DRAM].base;
int i;
unsigned int smp_cpus = machine->smp.cpus;
@@ -489,6 +490,14 @@ static void riscv_virt_board_init(MachineState *machine)
}
}
+ if (drive_get(IF_PFLASH, 0, 0)) {
+ /*
+ * Pflash was supplied, let's overwrite the address we jump to after
+ * reset to the base of the flash.
+ */
+ start_addr = virt_memmap[VIRT_FLASH].base;
+ }
+
/* reset vector */
uint32_t reset_vec[8] = {
0x00000297, /* 1: auipc t0, %pcrel_hi(dtb) */
@@ -501,7 +510,7 @@ static void riscv_virt_board_init(MachineState *machine)
#endif
0x00028067, /* jr t0 */
0x00000000,
- memmap[VIRT_DRAM].base, /* start: .dword memmap[VIRT_DRAM].base */
+ start_addr, /* start: .dword */
0x00000000,
/* dtb: */
};