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authorDaniel Henrique Barboza2022-07-28 20:19:26 +0200
committerAlistair Francis2022-09-07 09:18:33 +0200
commit6934f15b225c9324eafa064d3520a698ed09f9df (patch)
treefdc54c8d519a3450f2fd8d9cf7e950ac4739b01a /hw/riscv
parenttarget/riscv: Add Zihintpause support (diff)
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hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec()
The 'fdt' param is not being used in riscv_setup_rom_reset_vec(). Simplify the API by removing it. While we're at it, remove the redundant 'return' statement at the end of function. Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Alistair Francis <alistair.francis@wdc.com> Cc: Bin Meng <bin.meng@windriver.com> Cc: Vijai Kumar K <vijai@behindbytes.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20220728181926.2123771-1-danielhb413@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r--hw/riscv/boot.c4
-rw-r--r--hw/riscv/microchip_pfsoc.c2
-rw-r--r--hw/riscv/shakti_c.c3
-rw-r--r--hw/riscv/spike.c2
-rw-r--r--hw/riscv/virt.c2
5 files changed, 5 insertions, 8 deletions
diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
index 06b4fc5ac3..1ae7596873 100644
--- a/hw/riscv/boot.c
+++ b/hw/riscv/boot.c
@@ -286,7 +286,7 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts
hwaddr start_addr,
hwaddr rom_base, hwaddr rom_size,
uint64_t kernel_entry,
- uint64_t fdt_load_addr, void *fdt)
+ uint64_t fdt_load_addr)
{
int i;
uint32_t start_addr_hi32 = 0x00000000;
@@ -326,8 +326,6 @@ void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts
rom_base, &address_space_memory);
riscv_rom_copy_firmware_info(machine, rom_base, rom_size, sizeof(reset_vec),
kernel_entry);
-
- return;
}
void riscv_setup_direct_kernel(hwaddr kernel_addr, hwaddr fdt_addr)
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index 10a5d0e501..7313153606 100644
--- a/hw/riscv/microchip_pfsoc.c
+++ b/hw/riscv/microchip_pfsoc.c
@@ -583,7 +583,7 @@ static void microchip_icicle_kit_machine_init(MachineState *machine)
riscv_setup_rom_reset_vec(machine, &s->soc.u_cpus, firmware_load_addr,
memmap[MICROCHIP_PFSOC_ENVM_DATA].base,
memmap[MICROCHIP_PFSOC_ENVM_DATA].size,
- kernel_entry, fdt_load_addr, machine->fdt);
+ kernel_entry, fdt_load_addr);
}
}
diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c
index 90e2cf609f..e43cc9445c 100644
--- a/hw/riscv/shakti_c.c
+++ b/hw/riscv/shakti_c.c
@@ -66,8 +66,7 @@ static void shakti_c_machine_state_init(MachineState *mstate)
riscv_setup_rom_reset_vec(mstate, &sms->soc.cpus,
shakti_c_memmap[SHAKTI_C_RAM].base,
shakti_c_memmap[SHAKTI_C_ROM].base,
- shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0,
- NULL);
+ shakti_c_memmap[SHAKTI_C_ROM].size, 0, 0);
if (mstate->firmware) {
riscv_load_firmware(mstate->firmware,
shakti_c_memmap[SHAKTI_C_RAM].base,
diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c
index e41b6aa9f0..5ba34543c8 100644
--- a/hw/riscv/spike.c
+++ b/hw/riscv/spike.c
@@ -308,7 +308,7 @@ static void spike_board_init(MachineState *machine)
riscv_setup_rom_reset_vec(machine, &s->soc[0], memmap[SPIKE_DRAM].base,
memmap[SPIKE_MROM].base,
memmap[SPIKE_MROM].size, kernel_entry,
- fdt_load_addr, s->fdt);
+ fdt_load_addr);
/* initialize HTIF using symbols found in load_kernel */
htif_mm_init(system_memory, mask_rom,
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index f2ce5663a4..c1e8e0fcaf 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -1305,7 +1305,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
riscv_setup_rom_reset_vec(machine, &s->soc[0], start_addr,
virt_memmap[VIRT_MROM].base,
virt_memmap[VIRT_MROM].size, kernel_entry,
- fdt_load_addr, machine->fdt);
+ fdt_load_addr);
/*
* Only direct boot kernel is currently supported for KVM VM,