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| author | Michael Clark | 2018-04-30 02:29:34 +0200 |
|---|---|---|
| committer | Palmer Dabbelt | 2018-10-17 22:02:24 +0200 |
| commit | b6aa6cedf481b46beb7e49c85ab52fdbb3abcf8e (patch) | |
| tree | 7ed737a117fbaeeb394663369702d18696f8ec68 /hw/riscv | |
| parent | RISC-V: Update CSR and interrupt definitions (diff) | |
| download | qemu-b6aa6cedf481b46beb7e49c85ab52fdbb3abcf8e.tar.gz qemu-b6aa6cedf481b46beb7e49c85ab52fdbb3abcf8e.tar.xz qemu-b6aa6cedf481b46beb7e49c85ab52fdbb3abcf8e.zip | |
RISC-V: Add missing free for plic_hart_config
Signed-off-by: Michael Clark <mjc@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'hw/riscv')
| -rw-r--r-- | hw/riscv/virt.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 005169eabc..6bd723dc3a 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -385,6 +385,8 @@ static void riscv_virt_board_init(MachineState *machine) serial_mm_init(system_memory, memmap[VIRT_UART0].base, 0, qdev_get_gpio_in(DEVICE(s->plic), UART0_IRQ), 399193, serial_hd(0), DEVICE_LITTLE_ENDIAN); + + g_free(plic_hart_config); } static void riscv_virt_board_machine_init(MachineClass *mc) |