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author | Bin Meng | 2020-06-08 16:17:40 +0200 |
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committer | Alistair Francis | 2020-06-19 17:25:27 +0200 |
commit | cfa32630d914373413c0b42faf756ccaabc4bbb9 (patch) | |
tree | 6837bfe195735b0eaee325e139577c33d7f3c2f4 /hw/riscv | |
parent | hw/riscv: sifive_u: Rename serial property get/set functions to a generic name (diff) | |
download | qemu-cfa32630d914373413c0b42faf756ccaabc4bbb9.tar.gz qemu-cfa32630d914373413c0b42faf756ccaabc4bbb9.tar.xz qemu-cfa32630d914373413c0b42faf756ccaabc4bbb9.zip |
hw/riscv: sifive_u: Add a new property msel for MSEL pin state
On SiFive FU540 SoC, the value stored at physical address 0x1000
stores the MSEL pin state that is used to control the next boot
location that ROM codes jump to.
Add a new property msel to sifive_u machine for this.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1591625864-31494-12-git-send-email-bmeng.cn@gmail.com
Message-Id: <1591625864-31494-12-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv')
-rw-r--r-- | hw/riscv/sifive_u.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 6dac662910..b04be42167 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -504,6 +504,13 @@ static void sifive_u_machine_instance_init(Object *obj) "Set on to tell QEMU's ROM to jump to " "flash. Otherwise QEMU will jump to DRAM"); + s->msel = 0; + object_property_add(obj, "msel", "uint32", + sifive_u_machine_get_uint32_prop, + sifive_u_machine_set_uint32_prop, NULL, &s->msel); + object_property_set_description(obj, "msel", + "Mode Select (MSEL[3:0]) pin state"); + s->serial = OTP_SERIAL; object_property_add(obj, "serial", "uint32", sifive_u_machine_get_uint32_prop, |