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| author | Bin Meng | 2020-09-01 03:39:07 +0200 |
|---|---|---|
| committer | Alistair Francis | 2020-09-10 00:54:18 +0200 |
| commit | dfc388797cc413072e58a8f9a831633f29212448 (patch) | |
| tree | 5f724d555e92eacfda103e7eefd48265a73bb0b7 /hw/riscv | |
| parent | hw/net: cadence_gem: Add a new 'phy-addr' property (diff) | |
| download | qemu-dfc388797cc413072e58a8f9a831633f29212448.tar.gz qemu-dfc388797cc413072e58a8f9a831633f29212448.tar.xz qemu-dfc388797cc413072e58a8f9a831633f29212448.zip | |
hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23
When cadence_gem model was created for Xilinx boards, the PHY address
was hard-coded to 23 in the GEM model. Now that we have introduced a
property we can use that to tell GEM model what our PHY address is.
Change all boards' GEM 'phy-addr' property value to 23, and set the
PHY address default value to 0 in the GEM model.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-13-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/riscv')
0 files changed, 0 insertions, 0 deletions