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| author | Richard Henderson | 2022-06-09 15:47:03 +0200 |
|---|---|---|
| committer | Richard Henderson | 2022-06-09 15:47:03 +0200 |
| commit | 028f2361d0c2d28d6f918fe618f389228ac22b60 (patch) | |
| tree | e5b2823dcd0fb5b28ec779410f8204fed8a40765 /hw/rtc/trace.h | |
| parent | Merge tag 'vfio-updates-20220608.0' of https://gitlab.com/alex.williamson/qem... (diff) | |
| parent | target/arm: Add ID_AA64SMFR0_EL1 (diff) | |
| download | qemu-028f2361d0c2d28d6f918fe618f389228ac22b60.tar.gz qemu-028f2361d0c2d28d6f918fe618f389228ac22b60.tar.xz qemu-028f2361d0c2d28d6f918fe618f389228ac22b60.zip | |
Merge tag 'pull-target-arm-20220609' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* target/arm: Declare support for FEAT_RASv1p1
* target/arm: Implement FEAT_DoubleFault
* Fix 'writeable' typos
* xlnx_dp: Implement vblank interrupt
* target/arm: Move page-table-walk code to ptw.c
* target/arm: Preparatory patches for SME support
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# gpg: Signature made Thu 09 Jun 2022 02:04:13 AM PDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
* tag 'pull-target-arm-20220609' of https://git.linaro.org/people/pmaydell/qemu-arm: (55 commits)
target/arm: Add ID_AA64SMFR0_EL1
target/arm: Add isar_feature_aa64_sme
target/arm: Export bfdotadd from vec_helper.c
target/arm: Move expand_pred_h to vec_internal.h
target/arm: Use expand_pred_b in mve_helper.c
target/arm: Move expand_pred_b to vec_internal.h
target/arm: Export sve contiguous ldst support functions
target/arm: Split out load/store primitives to sve_ldst_internal.h
target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el
target/arm: Use uint32_t instead of bitmap for sve vq's
target/arm: Merge aarch64_sve_zcr_get_valid_len into caller
target/arm: Do not use aarch64_sve_zcr_get_valid_len in reset
target/arm: Hoist arm_is_el2_enabled check in sve_exception_el
target/arm: Use el_is_in_host for sve_exception_el
target/arm: Use el_is_in_host for sve_zcr_len_for_el
target/arm: Add el_is_in_host
target/arm: Remove fp checks from sve_exception_el
target/arm: Remove route_to_el2 check from sve_exception_el
linux-user/aarch64: Introduce sve_vq
target/arm: Rename TBFLAG_A64 ZCR_LEN to VL
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/rtc/trace.h')
0 files changed, 0 insertions, 0 deletions