diff options
author | Kevin O'Connor | 2014-12-09 00:10:34 +0100 |
---|---|---|
committer | Paolo Bonzini | 2014-12-15 17:34:43 +0100 |
commit | c7ff8daacf4a669f9ab5a975f33a51ef901b7556 (patch) | |
tree | b7e3c9ec30451716b29b6bbf0939d60583162471 /hw/sd | |
parent | serial: only resample THR interrupt on rising edge of IER.THRI (diff) | |
download | qemu-c7ff8daacf4a669f9ab5a975f33a51ef901b7556.tar.gz qemu-c7ff8daacf4a669f9ab5a975f33a51ef901b7556.tar.xz qemu-c7ff8daacf4a669f9ab5a975f33a51ef901b7556.zip |
sdhci: Set a default frequency clock
The Linux SDHCI PCI driver will only register the device if there is a
clock frequency set. So, set a default frequency of 52Mhz.
Signed-off-by: Kevin O'Connor <kevin@koconnor.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/sd')
-rw-r--r-- | hw/sd/sdhci.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index b38005003c..9ef99b67d5 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -74,10 +74,10 @@ #define SDHC_CAPAB_MAXBLOCKLENGTH 512ul /* Maximum clock frequency for SDclock in MHz * value in range 10-63 MHz, 0 - not defined */ -#define SDHC_CAPAB_BASECLKFREQ 0ul +#define SDHC_CAPAB_BASECLKFREQ 52ul #define SDHC_CAPAB_TOUNIT 1ul /* Timeout clock unit 0 - kHz, 1 - MHz */ /* Timeout clock frequency 1-63, 0 - not defined */ -#define SDHC_CAPAB_TOCLKFREQ 0ul +#define SDHC_CAPAB_TOCLKFREQ 52ul /* Now check all parameters and calculate CAPABILITIES REGISTER value */ #if SDHC_CAPAB_64BITBUS > 1 || SDHC_CAPAB_18V > 1 || SDHC_CAPAB_30V > 1 || \ |