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| author | Alexander Graf | 2010-12-08 12:05:49 +0100 |
|---|---|---|
| committer | Blue Swirl | 2010-12-11 16:24:26 +0100 |
| commit | 968d683c042d80821a00a76608ae770a7401cac0 (patch) | |
| tree | 90528f9386c5712a6a6c15de6b2a3eff5852a5f6 /hw/sh_pci.c | |
| parent | heathrow_pic: Declare as little endian (diff) | |
| download | qemu-968d683c042d80821a00a76608ae770a7401cac0.tar.gz qemu-968d683c042d80821a00a76608ae770a7401cac0.tar.xz qemu-968d683c042d80821a00a76608ae770a7401cac0.zip | |
isa_mmio: Always use little endian
This patch converts the ISA MMIO bridge code to always use little endian mmio.
All bswap code that existed was only there to convert from native cpu
endianness to little endian ISA devices.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/sh_pci.c')
| -rw-r--r-- | hw/sh_pci.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/sh_pci.c b/hw/sh_pci.c index 6042d9c153..072078be51 100644 --- a/hw/sh_pci.c +++ b/hw/sh_pci.c @@ -54,7 +54,7 @@ static void sh_pci_reg_write (void *p, target_phys_addr_t addr, uint32_t val) cpu_register_physical_memory(pcic->iobr & 0xfffc0000, 0x40000, IO_MEM_UNASSIGNED); pcic->iobr = val & 0xfffc0001; - isa_mmio_init(pcic->iobr & 0xfffc0000, 0x40000, 0); + isa_mmio_init(pcic->iobr & 0xfffc0000, 0x40000); } break; case 0x220: @@ -109,7 +109,7 @@ PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, cpu_register_physical_memory(0xfe200000, 0x224, reg); p->iobr = 0xfe240000; - isa_mmio_init(p->iobr, 0x40000, 0); + isa_mmio_init(p->iobr, 0x40000); pci_config_set_vendor_id(p->dev->config, PCI_VENDOR_ID_HITACHI); pci_config_set_device_id(p->dev->config, PCI_DEVICE_ID_HITACHI_SH7751R); |