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authorDavid Gibson2012-09-12 18:57:18 +0200
committerAlexander Graf2012-10-04 15:54:18 +0200
commitff9d2afa618acd81d926c9c213b4ff5f7163db1d (patch)
tree7a1ed80fb959de8e5c961027cdd3b327ba124278 /hw/spapr.h
parentpseries: Remove C bitfields from xics code (diff)
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pseries: Remove XICS irq type enum type
Currently the XICS interrupt controller emulation uses a custom enum to specify whether a given interrupt is level-sensitive or message-triggered. This enum makes life awkward for saving the state, and isn't particularly useful since there are only two possibilities. This patch replaces the enum with a simple bool. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/spapr.h')
-rw-r--r--hw/spapr.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/spapr.h b/hw/spapr.h
index f9a7b0fa33..51a966b1e9 100644
--- a/hw/spapr.h
+++ b/hw/spapr.h
@@ -291,17 +291,17 @@ void spapr_register_hypercall(target_ulong opcode, spapr_hcall_fn fn);
target_ulong spapr_hypercall(CPUPPCState *env, target_ulong opcode,
target_ulong *args);
-int spapr_allocate_irq(int hint, enum xics_irq_type type);
-int spapr_allocate_irq_block(int num, enum xics_irq_type type);
+int spapr_allocate_irq(int hint, bool lsi);
+int spapr_allocate_irq_block(int num, bool lsi);
static inline int spapr_allocate_msi(int hint)
{
- return spapr_allocate_irq(hint, XICS_MSI);
+ return spapr_allocate_irq(hint, false);
}
static inline int spapr_allocate_lsi(int hint)
{
- return spapr_allocate_irq(hint, XICS_LSI);
+ return spapr_allocate_irq(hint, true);
}
static inline uint32_t rtas_ld(target_ulong phys, int n)