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| author | Bin Meng | 2020-09-01 03:39:11 +0200 |
|---|---|---|
| committer | Alistair Francis | 2020-09-10 00:54:19 +0200 |
| commit | 834e027a3452e1c139c5400cae550c6c5a340b28 (patch) | |
| tree | e3acff6dc4b34ba338ea59ac714951460109b819 /hw/sparc | |
| parent | hw/riscv: clint: Avoid using hard-coded timebase frequency (diff) | |
| download | qemu-834e027a3452e1c139c5400cae550c6c5a340b28.tar.gz qemu-834e027a3452e1c139c5400cae550c6c5a340b28.tar.xz qemu-834e027a3452e1c139c5400cae550c6c5a340b28.zip | |
hw/riscv: sifive_u: Connect a DMA controller
SiFive FU540 SoC integrates a platform DMA controller with 4 DMA
channels. This connects the exsiting SiFive PDMA model to the SoC,
and adds its device tree data as well.
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <1598924352-89526-17-git-send-email-bmeng.cn@gmail.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'hw/sparc')
0 files changed, 0 insertions, 0 deletions