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| author | Blue Swirl | 2011-08-07 21:22:46 +0200 |
|---|---|---|
| committer | Blue Swirl | 2011-08-21 21:52:35 +0200 |
| commit | 61999750d3df96ee3f2b111420c7d0a117e57df7 (patch) | |
| tree | 91701cba2a0949b48bf9a7cc6798b1d0c72fa9a0 /hw/sun4m.c | |
| parent | tcx: avoid structure holes spotted by pahole (diff) | |
| download | qemu-61999750d3df96ee3f2b111420c7d0a117e57df7.tar.gz qemu-61999750d3df96ee3f2b111420c7d0a117e57df7.tar.xz qemu-61999750d3df96ee3f2b111420c7d0a117e57df7.zip | |
sun4m: avoid structure holes spotted by pahole
Edited report from pahole on amd64 host:
struct sun4c_hwdef {
...
uint8_t nvram_machine_id; /* 112 1 */
/* XXX 1 byte hole, try to pack */
...
/* size: 136, cachelines: 3 */
/* sum members: 135, holes: 1, sum holes: 1 */
/* last cacheline: 8 bytes */
}; /* definitions: 1 */
struct sun4d_hwdef {
...
uint8_t nvram_machine_id; /* 128 1 */
/* XXX 1 byte hole, try to pack */
...
/* size: 152, cachelines: 3 */
/* sum members: 151, holes: 1, sum holes: 1 */
/* last cacheline: 24 bytes */
}; /* definitions: 1 */
struct sun4m_hwdef {
...
uint8_t nvram_machine_id; /* 260 1 */
/* XXX 1 byte hole, try to pack */
uint16_t machine_id; /* 262 2 */
uint32_t iommu_version; /* 264 4 */
/* XXX 4 bytes hole, try to pack */
...
/* size: 288, cachelines: 5 */
/* sum members: 283, holes: 2, sum holes: 5 */
/* last cacheline: 32 bytes */
}; /* definitions: 1 */
Fix by rearranging the structures to avoid padding.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'hw/sun4m.c')
| -rw-r--r-- | hw/sun4m.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/hw/sun4m.c b/hw/sun4m.c index 7516703a58..dcaed38773 100644 --- a/hw/sun4m.c +++ b/hw/sun4m.c @@ -97,12 +97,12 @@ struct sun4m_hwdef { target_phys_addr_t reg_base, vram_base; } vsimm[MAX_VSIMMS]; target_phys_addr_t ecc_base; - uint32_t ecc_version; - uint8_t nvram_machine_id; - uint16_t machine_id; - uint32_t iommu_version; uint64_t max_mem; const char * const default_cpu_model; + uint32_t ecc_version; + uint32_t iommu_version; + uint16_t machine_id; + uint8_t nvram_machine_id; }; #define MAX_IOUNITS 5 @@ -115,11 +115,11 @@ struct sun4d_hwdef { target_phys_addr_t ledma_base, le_base; target_phys_addr_t tcx_base; target_phys_addr_t sbi_base; - uint8_t nvram_machine_id; - uint16_t machine_id; - uint32_t iounit_version; uint64_t max_mem; const char * const default_cpu_model; + uint32_t iounit_version; + uint16_t machine_id; + uint8_t nvram_machine_id; }; struct sun4c_hwdef { @@ -128,11 +128,11 @@ struct sun4c_hwdef { target_phys_addr_t serial_base, fd_base; target_phys_addr_t idreg_base, dma_base, esp_base, le_base; target_phys_addr_t tcx_base, aux1_base; - uint8_t nvram_machine_id; - uint16_t machine_id; - uint32_t iommu_version; uint64_t max_mem; const char * const default_cpu_model; + uint32_t iommu_version; + uint16_t machine_id; + uint8_t nvram_machine_id; }; int DMA_get_channel_mode (int nchan) |