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| author | Alistair Francis | 2021-08-30 07:34:20 +0200 |
|---|---|---|
| committer | Alistair Francis | 2021-09-20 23:56:49 +0200 |
| commit | 0f0b70eeecdd4e0f29efe28a7ffec01cbe5c43bf (patch) | |
| tree | d375b12954a4b939bc8a135790b7450b7a56d9eb /hw/timer/aspeed_timer.c | |
| parent | target/riscv: Fix satp write (diff) | |
| download | qemu-0f0b70eeecdd4e0f29efe28a7ffec01cbe5c43bf.tar.gz qemu-0f0b70eeecdd4e0f29efe28a7ffec01cbe5c43bf.tar.xz qemu-0f0b70eeecdd4e0f29efe28a7ffec01cbe5c43bf.zip | |
target/riscv: Expose interrupt pending bits as GPIO lines
Expose the 12 interrupt pending bits in MIP as GPIO lines.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 069d6162f0bc2f4a4f5a44e73f6442b11c703c53.1630301632.git.alistair.francis@wdc.com
Diffstat (limited to 'hw/timer/aspeed_timer.c')
0 files changed, 0 insertions, 0 deletions