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| author | Peter Maydell | 2021-08-12 11:33:51 +0200 |
|---|---|---|
| committer | Peter Maydell | 2021-09-01 12:08:20 +0200 |
| commit | 3b76e18520330e2a23c86d7c627c1cd4a3ed32f2 (patch) | |
| tree | bdab5e9a7671c5496f0c2e67eb5dc4dfaed0c518 /hw/timer | |
| parent | hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk property (diff) | |
| download | qemu-3b76e18520330e2a23c86d7c627c1cd4a3ed32f2.tar.gz qemu-3b76e18520330e2a23c86d7c627c1cd4a3ed32f2.tar.xz qemu-3b76e18520330e2a23c86d7c627c1cd4a3ed32f2.zip | |
hw/arm/msf2-soc: Wire up refclk
Wire up the refclk for the msf2 SoC. This SoC runs the refclk at a
frequency which is programmably either /4, /8, /16 or /32 of the main
CPU clock. We don't currently model the register which allows the
guest to set the divisor, so implement the refclk as a fixed /32 of
the CPU clock (which is the value of the divisor at reset).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Damien Hedde <damien.hedde@greensocs.com>
Message-id: 20210812093356.1946-21-peter.maydell@linaro.org
Diffstat (limited to 'hw/timer')
0 files changed, 0 insertions, 0 deletions