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| author | Alistair Francis | 2016-10-04 14:28:07 +0200 |
|---|---|---|
| committer | Peter Maydell | 2016-10-04 14:28:07 +0200 |
| commit | cbcb93e802076ecea9b3defe609ce4a45719e809 (patch) | |
| tree | 252733337f684c4f6c94a9a7af29f0e030cc7d1b /hw/timer | |
| parent | STM32F205: Remove the individual device variables (diff) | |
| download | qemu-cbcb93e802076ecea9b3defe609ce4a45719e809.tar.gz qemu-cbcb93e802076ecea9b3defe609ce4a45719e809.tar.xz qemu-cbcb93e802076ecea9b3defe609ce4a45719e809.zip | |
STM32F2xx: Display PWM duty cycle from timer
If correctly configured allow the STM32F2xx timer to print
out the PWM duty cycle information.
Signed-off-by: Alistair Francis <alistair@alistair23.me>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: cdb59039a25e061615713a94b40797baa12ea9f9.1474742262.git.alistair@alistair23.me
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/timer')
| -rw-r--r-- | hw/timer/stm32f2xx_timer.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c index bf0fb288c4..8c4c1f9f05 100644 --- a/hw/timer/stm32f2xx_timer.c +++ b/hw/timer/stm32f2xx_timer.c @@ -51,6 +51,15 @@ static void stm32f2xx_timer_interrupt(void *opaque) qemu_irq_pulse(s->irq); stm32f2xx_timer_set_alarm(s, s->hit_time); } + + if (s->tim_ccmr1 & (TIM_CCMR1_OC2M2 | TIM_CCMR1_OC2M1) && + !(s->tim_ccmr1 & TIM_CCMR1_OC2M0) && + s->tim_ccmr1 & TIM_CCMR1_OC2PE && + s->tim_ccer & TIM_CCER_CC2E) { + /* PWM 2 - Mode 1 */ + DB_PRINT("PWM2 Duty Cycle: %d%%\n", + s->tim_ccr2 / (100 * (s->tim_psc + 1))); + } } static inline int64_t stm32f2xx_ns_to_ticks(STM32F2XXTimerState *s, int64_t t) |