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| author | Luc MICHEL | 2018-01-15 10:32:20 +0100 |
|---|---|---|
| committer | David Gibson | 2018-01-16 23:35:24 +0100 |
| commit | 2e569845bd314fc1dde83d65dc9b87e71b4d29b4 (patch) | |
| tree | a2edebee6f766b431dec12e73c8990b782055a2d /hw/virtio/virtio-pci.c | |
| parent | target/ppc: add support for POWER9 HILE (diff) | |
| download | qemu-2e569845bd314fc1dde83d65dc9b87e71b4d29b4.tar.gz qemu-2e569845bd314fc1dde83d65dc9b87e71b4d29b4.tar.xz qemu-2e569845bd314fc1dde83d65dc9b87e71b4d29b4.zip | |
target-ppc: Fix booke206 tlbwe TLB instruction
When overwritting a valid TLB entry with a new one, the previous page
were not flushed in QEMU TLB, leading to incoherent mapping. This commit
fixes this.
Signed-off-by: Luc MICHEL <luc.michel@git.antfield.fr>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'hw/virtio/virtio-pci.c')
0 files changed, 0 insertions, 0 deletions