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authorbalrog2008-01-14 02:52:52 +0100
committerbalrog2008-01-14 02:52:52 +0100
commit1492a3c467c5f8659ded7ef5383514f8264f8aa0 (patch)
treebe984c3b28806d69cc831207a8b749e70a47d88f /hw/vmware_vga.c
parentReduce redundant timer ticks in VNC, by Anders Melchiorsen. (diff)
downloadqemu-1492a3c467c5f8659ded7ef5383514f8264f8aa0.tar.gz
qemu-1492a3c467c5f8659ded7ef5383514f8264f8aa0.tar.xz
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Register io ports as selected by PCI config in VMware SVGA.
Should prevent segfaults with RTL8139. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3905 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/vmware_vga.c')
-rw-r--r--hw/vmware_vga.c36
1 files changed, 23 insertions, 13 deletions
diff --git a/hw/vmware_vga.c b/hw/vmware_vga.c
index 6cae25ce11..bd96e6ba85 100644
--- a/hw/vmware_vga.c
+++ b/hw/vmware_vga.c
@@ -1100,19 +1100,6 @@ static void vmsvga_init(struct vmsvga_state_s *s, DisplayState *ds,
cpu_register_physical_memory(SVGA_MEM_BASE, vga_ram_size,
iomemtype);
- register_ioport_read(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_INDEX_PORT,
- 1, 4, vmsvga_index_read, s);
- register_ioport_write(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_INDEX_PORT,
- 1, 4, vmsvga_index_write, s);
- register_ioport_read(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_VALUE_PORT,
- 1, 4, vmsvga_value_read, s);
- register_ioport_write(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_VALUE_PORT,
- 1, 4, vmsvga_value_write, s);
- register_ioport_read(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_BIOS_PORT,
- 1, 4, vmsvga_bios_read, s);
- register_ioport_write(SVGA_IO_BASE + SVGA_IO_MUL * SVGA_BIOS_PORT,
- 1, 4, vmsvga_bios_write, s);
-
graphic_console_init(ds, vmsvga_update_display,
vmsvga_invalidate_display, vmsvga_screen_dump, s);
@@ -1146,6 +1133,26 @@ static int pci_vmsvga_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
+static void pci_vmsvga_map_ioport(PCIDevice *pci_dev, int region_num,
+ uint32_t addr, uint32_t size, int type)
+{
+ struct pci_vmsvga_state_s *d = (struct pci_vmsvga_state_s *) pci_dev;
+ struct vmsvga_state_s *s = &d->chip;
+
+ register_ioport_read(addr + SVGA_IO_MUL * SVGA_INDEX_PORT,
+ 1, 4, vmsvga_index_read, s);
+ register_ioport_write(addr + SVGA_IO_MUL * SVGA_INDEX_PORT,
+ 1, 4, vmsvga_index_write, s);
+ register_ioport_read(addr + SVGA_IO_MUL * SVGA_VALUE_PORT,
+ 1, 4, vmsvga_value_read, s);
+ register_ioport_write(addr + SVGA_IO_MUL * SVGA_VALUE_PORT,
+ 1, 4, vmsvga_value_write, s);
+ register_ioport_read(addr + SVGA_IO_MUL * SVGA_BIOS_PORT,
+ 1, 4, vmsvga_bios_read, s);
+ register_ioport_write(addr + SVGA_IO_MUL * SVGA_BIOS_PORT,
+ 1, 4, vmsvga_bios_write, s);
+}
+
#define PCI_VENDOR_ID_VMWARE 0x15ad
#define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405
#define PCI_DEVICE_ID_VMWARE_SVGA 0x0710
@@ -1189,6 +1196,9 @@ void pci_vmsvga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
s->card.config[0x2f] = SVGA_PCI_DEVICE_ID >> 8;
s->card.config[0x3c] = 0xff; /* End */
+ pci_register_io_region(&s->card, 0, 0x10,
+ PCI_ADDRESS_SPACE_IO, pci_vmsvga_map_ioport);
+
vmsvga_init(&s->chip, ds, vga_ram_base, vga_ram_offset, vga_ram_size);
register_savevm("vmware_vga", 0, 0, pci_vmsvga_save, pci_vmsvga_load, s);