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| author | Jan Beulich | 2015-12-09 16:46:57 +0100 |
|---|---|---|
| committer | Stefano Stabellini | 2015-12-09 16:46:57 +0100 |
| commit | bdfe5159cbaebf9e935786040459c56d23646d5a (patch) | |
| tree | d570174dca4dcd93941ea22fca475daeadedd094 /hw/xen | |
| parent | xen/MSI-X: latch MSI-X table writes (diff) | |
| download | qemu-bdfe5159cbaebf9e935786040459c56d23646d5a.tar.gz qemu-bdfe5159cbaebf9e935786040459c56d23646d5a.tar.xz qemu-bdfe5159cbaebf9e935786040459c56d23646d5a.zip | |
xen/MSI-X: really enforce alignment
The way the generic infrastructure works the intention of not allowing
unaligned accesses can't be achieved by simply setting .unaligned to
false. The benefit is that we can now replace the conditionals in
{get,set}_entry_value() by assert()-s.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Diffstat (limited to 'hw/xen')
| -rw-r--r-- | hw/xen/xen_pt_msi.c | 22 |
1 files changed, 16 insertions, 6 deletions
diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index e10cd2a79f..302a310190 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -421,16 +421,14 @@ int xen_pt_msix_update_remap(XenPCIPassthroughState *s, int bar_index) static uint32_t get_entry_value(XenPTMSIXEntry *e, int offset) { - return !(offset % sizeof(*e->latch)) - ? e->latch[offset / sizeof(*e->latch)] : 0; + assert(!(offset % sizeof(*e->latch))); + return e->latch[offset / sizeof(*e->latch)]; } static void set_entry_value(XenPTMSIXEntry *e, int offset, uint32_t val) { - if (!(offset % sizeof(*e->latch))) - { - e->latch[offset / sizeof(*e->latch)] = val; - } + assert(!(offset % sizeof(*e->latch))); + e->latch[offset / sizeof(*e->latch)] = val; } static void pci_msix_write(void *opaque, hwaddr addr, @@ -494,6 +492,12 @@ static uint64_t pci_msix_read(void *opaque, hwaddr addr, } } +static bool pci_msix_accepts(void *opaque, hwaddr addr, + unsigned size, bool is_write) +{ + return !(addr & (size - 1)); +} + static const MemoryRegionOps pci_msix_ops = { .read = pci_msix_read, .write = pci_msix_write, @@ -502,7 +506,13 @@ static const MemoryRegionOps pci_msix_ops = { .min_access_size = 4, .max_access_size = 4, .unaligned = false, + .accepts = pci_msix_accepts }, + .impl = { + .min_access_size = 4, + .max_access_size = 4, + .unaligned = false + } }; int xen_pt_msix_init(XenPCIPassthroughState *s, uint32_t base) |