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| author | Peter A. G. Crosthwaite | 2012-06-13 06:46:43 +0200 |
|---|---|---|
| committer | Edgar E. Iglesias | 2012-06-15 13:08:13 +0200 |
| commit | abe098e4f93a80b0756c0e8e728bc78c47a91127 (patch) | |
| tree | 3f2145d259d793c7a9b8678b854c304acd8356a6 /hw/xilinx.h | |
| parent | xilinx_timer: added default frequency (diff) | |
| download | qemu-abe098e4f93a80b0756c0e8e728bc78c47a91127.tar.gz qemu-abe098e4f93a80b0756c0e8e728bc78c47a91127.tar.xz qemu-abe098e4f93a80b0756c0e8e728bc78c47a91127.zip | |
xilinx_timer: changed nr_timers to one_timer_only
The configurable property for this IP in the Xilinx tools is a boolean switch
"one-timer-only" that flicks this timer from being dual channel to single.
Updated QEMU to work the same way for better match with the IP core and its TRM.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Diffstat (limited to 'hw/xilinx.h')
| -rw-r--r-- | hw/xilinx.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/xilinx.h b/hw/xilinx.h index 70d15cfcf9..97afa4552b 100644 --- a/hw/xilinx.h +++ b/hw/xilinx.h @@ -16,12 +16,12 @@ xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr) /* OPB Timer/Counter. */ static inline DeviceState * -xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int nr, int freq) +xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int oto, int freq) { DeviceState *dev; dev = qdev_create(NULL, "xilinx,timer"); - qdev_prop_set_uint32(dev, "nr-timers", nr); + qdev_prop_set_uint32(dev, "one-timer-only", oto); qdev_prop_set_uint32(dev, "frequency", freq); qdev_init_nofail(dev); sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); |