diff options
| author | Cédric Le Goater | 2018-06-15 15:57:15 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-06-15 16:23:34 +0200 |
| commit | 2151b044fdca74a4fe7148f302ba9d6191516744 (patch) | |
| tree | 8164c128ed43d434f7b56264f6cb9852ee6f9fe6 /hw | |
| parent | aspeed_scu: Implement RNG register (diff) | |
| download | qemu-2151b044fdca74a4fe7148f302ba9d6191516744.tar.gz qemu-2151b044fdca74a4fe7148f302ba9d6191516744.tar.xz qemu-2151b044fdca74a4fe7148f302ba9d6191516744.zip | |
m25p80: add support for two bytes WRSR for Macronix chips
On Macronix chips, two bytes can written to the WRSR. First byte will
configure the status register and the second the configuration
register. It is important to save the configuration value as it
contains the dummy cycle setting when using dual or quad IO mode.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/block/m25p80.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c index a5ccffb4aa..b0ed8fa418 100644 --- a/hw/block/m25p80.c +++ b/hw/block/m25p80.c @@ -698,6 +698,7 @@ static void complete_collecting_data(Flash *s) case MAN_MACRONIX: s->quad_enable = extract32(s->data[0], 6, 1); if (s->len > 1) { + s->volatile_cfg = s->data[1]; s->four_bytes_address_mode = extract32(s->data[1], 5, 1); } break; |