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| author | Philippe Mathieu-Daudé | 2020-10-02 20:10:32 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-10-08 16:24:32 +0200 |
| commit | 3059344f01e1bf9625570ef2e8396fa011e9431d (patch) | |
| tree | fcc46478d34d21240347bd736bfa8c5bdec71146 /hw | |
| parent | hw/arm/sbsa-ref : allocate IRQs for SMMUv3 (diff) | |
| download | qemu-3059344f01e1bf9625570ef2e8396fa011e9431d.tar.gz qemu-3059344f01e1bf9625570ef2e8396fa011e9431d.tar.xz qemu-3059344f01e1bf9625570ef2e8396fa011e9431d.zip | |
hw/char/bcm2835_aux: Allow less than 32-bit accesses
The "BCM2835 ARM Peripherals" datasheet [*] chapter 2
("Auxiliaries: UART1 & SPI1, SPI2"), list the register
sizes as 3/8/16/32 bits. We assume this means this
peripheral allows 8-bit accesses.
This was not an issue until commit 5d971f9e67 which reverted
("memory: accept mismatching sizes in memory_region_access_valid").
The model is implemented as 32-bit accesses (see commit 97398d900c,
all registers are 32-bit) so replace MemoryRegionOps.valid as
MemoryRegionOps.impl, and re-introduce MemoryRegionOps.valid
with a 8/32-bit range.
[*] https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf
Fixes: 97398d900c ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201002181032.1899463-1-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/char/bcm2835_aux.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c index ee3dd40e3c..dade2ab5fd 100644 --- a/hw/char/bcm2835_aux.c +++ b/hw/char/bcm2835_aux.c @@ -249,7 +249,9 @@ static const MemoryRegionOps bcm2835_aux_ops = { .read = bcm2835_aux_read, .write = bcm2835_aux_write, .endianness = DEVICE_NATIVE_ENDIAN, - .valid.min_access_size = 4, + .impl.min_access_size = 4, + .impl.max_access_size = 4, + .valid.min_access_size = 1, .valid.max_access_size = 4, }; |