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author | Peter Maydell | 2021-01-06 14:31:11 +0100 |
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committer | Peter Maydell | 2021-01-06 14:31:11 +0100 |
commit | 30918661c17f90ae25a559a91603142f2bcfa34b (patch) | |
tree | 6a76c22cf81254d35e5b9345e42d16bb7e4da71b /hw | |
parent | Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210106' in... (diff) | |
parent | sun4m: don't connect two qemu_irqs directly to the same input (diff) | |
download | qemu-30918661c17f90ae25a559a91603142f2bcfa34b.tar.gz qemu-30918661c17f90ae25a559a91603142f2bcfa34b.tar.xz qemu-30918661c17f90ae25a559a91603142f2bcfa34b.zip |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210106' into staging
qemu-sparc queue
# gpg: Signature made Wed 06 Jan 2021 11:43:02 GMT
# gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg: issuer "mark.cave-ayland@ilande.co.uk"
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-20210106:
sun4m: don't connect two qemu_irqs directly to the same input
include/hw/sparc/grlib.h: Remove unused set_pil_in_fn typedef
hw/sparc: Make grlib-irqmp device handle its own inbound IRQ lines
hw/timer/slavio_timer: Allow 64-bit accesses
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/intc/grlib_irqmp.c | 5 | ||||
-rw-r--r-- | hw/sparc/Kconfig | 1 | ||||
-rw-r--r-- | hw/sparc/leon3.c | 21 | ||||
-rw-r--r-- | hw/sparc/sun4m.c | 24 | ||||
-rw-r--r-- | hw/timer/slavio_timer.c | 4 |
5 files changed, 37 insertions, 18 deletions
diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index ffec4a07ee..984334fa7b 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -51,6 +51,8 @@ #define FORCE_OFFSET 0x80 #define EXTENDED_OFFSET 0xC0 +#define MAX_PILS 16 + OBJECT_DECLARE_SIMPLE_TYPE(IRQMP, GRLIB_IRQMP) typedef struct IRQMPState IRQMPState; @@ -126,7 +128,7 @@ void grlib_irqmp_ack(DeviceState *dev, int intno) grlib_irqmp_ack_mask(state, mask); } -void grlib_irqmp_set_irq(void *opaque, int irq, int level) +static void grlib_irqmp_set_irq(void *opaque, int irq, int level) { IRQMP *irqmp = GRLIB_IRQMP(opaque); IRQMPState *s; @@ -328,6 +330,7 @@ static void grlib_irqmp_init(Object *obj) IRQMP *irqmp = GRLIB_IRQMP(obj); SysBusDevice *dev = SYS_BUS_DEVICE(obj); + qdev_init_gpio_in(DEVICE(obj), grlib_irqmp_set_irq, MAX_PILS); qdev_init_gpio_out_named(DEVICE(obj), &irqmp->irq, "grlib-irq", 1); memory_region_init_io(&irqmp->iomem, obj, &grlib_irqmp_ops, irqmp, "irqmp", IRQMP_REG_SIZE); diff --git a/hw/sparc/Kconfig b/hw/sparc/Kconfig index 91805afab6..8dcb10086f 100644 --- a/hw/sparc/Kconfig +++ b/hw/sparc/Kconfig @@ -14,6 +14,7 @@ config SUN4M select M48T59 select STP2000 select CHRP_NVRAM + select OR_IRQ config LEON3 bool diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 4bc4ebea84..7e16eea9e6 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -52,8 +52,6 @@ #define LEON3_PROM_OFFSET (0x00000000) #define LEON3_RAM_OFFSET (0x40000000) -#define MAX_PILS 16 - #define LEON3_UART_OFFSET (0x80000100) #define LEON3_UART_IRQ (3) @@ -194,11 +192,10 @@ static void leon3_generic_hw_init(MachineState *machine) MemoryRegion *prom = g_new(MemoryRegion, 1); int ret; char *filename; - qemu_irq *cpu_irqs = NULL; int bios_size; int prom_size; ResetData *reset_info; - DeviceState *dev; + DeviceState *dev, *irqmpdev; int i; AHBPnp *ahb_pnp; APBPnp *apb_pnp; @@ -230,16 +227,15 @@ static void leon3_generic_hw_init(MachineState *machine) GRLIB_AHB_SLAVE, GRLIB_AHBMEM_AREA); /* Allocate IRQ manager */ - dev = qdev_new(TYPE_GRLIB_IRQMP); + irqmpdev = qdev_new(TYPE_GRLIB_IRQMP); qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, env, "pil", 1); - qdev_connect_gpio_out_named(dev, "grlib-irq", 0, + qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0, qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_IRQMP_OFFSET); - env->irq_manager = dev; + sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET); + env->irq_manager = irqmpdev; env->qemu_irq_ack = leon3_irq_manager; - cpu_irqs = qemu_allocate_irqs(grlib_irqmp_set_irq, dev, MAX_PILS); grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF, GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV, 2, 0, GRLIB_APBIO_AREA); @@ -330,7 +326,7 @@ static void leon3_generic_hw_init(MachineState *machine) sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_TIMER_OFFSET); for (i = 0; i < LEON3_TIMER_COUNT; i++) { sysbus_connect_irq(SYS_BUS_DEVICE(dev), i, - cpu_irqs[LEON3_TIMER_IRQ + i]); + qdev_get_gpio_in(irqmpdev, LEON3_TIMER_IRQ + i)); } grlib_apb_pnp_add_entry(apb_pnp, LEON3_TIMER_OFFSET, 0xFFF, @@ -342,7 +338,8 @@ static void leon3_generic_hw_init(MachineState *machine) qdev_prop_set_chr(dev, "chrdev", serial_hd(0)); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, LEON3_UART_OFFSET); - sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, cpu_irqs[LEON3_UART_IRQ]); + sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, + qdev_get_gpio_in(irqmpdev, LEON3_UART_IRQ)); grlib_apb_pnp_add_entry(apb_pnp, LEON3_UART_OFFSET, 0xFFF, GRLIB_VENDOR_GAISLER, GRLIB_APBUART_DEV, 1, LEON3_UART_IRQ, GRLIB_APBIO_AREA); diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 8686371318..38ca1e33c7 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -50,6 +50,7 @@ #include "hw/misc/empty_slot.h" #include "hw/misc/unimp.h" #include "hw/irq.h" +#include "hw/or-irq.h" #include "hw/loader.h" #include "elf.h" #include "trace.h" @@ -848,7 +849,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, uint32_t initrd_size; DriveInfo *fd[MAX_FD]; FWCfgState *fw_cfg; - DeviceState *dev; + DeviceState *dev, *ms_kb_orgate, *serial_orgate; SysBusDevice *s; unsigned int smp_cpus = machine->smp.cpus; unsigned int max_cpus = machine->smp.max_cpus; @@ -994,10 +995,16 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, qdev_prop_set_uint32(dev, "chnAtype", escc_kbd); s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); - sysbus_connect_irq(s, 0, slavio_irq[14]); - sysbus_connect_irq(s, 1, slavio_irq[14]); sysbus_mmio_map(s, 0, hwdef->ms_kb_base); + /* Logically OR both its IRQs together */ + ms_kb_orgate = DEVICE(object_new(TYPE_OR_IRQ)); + object_property_set_int(OBJECT(ms_kb_orgate), "num-lines", 2, &error_fatal); + qdev_realize_and_unref(ms_kb_orgate, NULL, &error_fatal); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(ms_kb_orgate, 0)); + sysbus_connect_irq(s, 1, qdev_get_gpio_in(ms_kb_orgate, 1)); + qdev_connect_gpio_out(DEVICE(ms_kb_orgate), 0, slavio_irq[14]); + dev = qdev_new(TYPE_ESCC); qdev_prop_set_uint32(dev, "disabled", 0); qdev_prop_set_uint32(dev, "frequency", ESCC_CLOCK); @@ -1009,10 +1016,17 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, s = SYS_BUS_DEVICE(dev); sysbus_realize_and_unref(s, &error_fatal); - sysbus_connect_irq(s, 0, slavio_irq[15]); - sysbus_connect_irq(s, 1, slavio_irq[15]); sysbus_mmio_map(s, 0, hwdef->serial_base); + /* Logically OR both its IRQs together */ + serial_orgate = DEVICE(object_new(TYPE_OR_IRQ)); + object_property_set_int(OBJECT(serial_orgate), "num-lines", 2, + &error_fatal); + qdev_realize_and_unref(serial_orgate, NULL, &error_fatal); + sysbus_connect_irq(s, 0, qdev_get_gpio_in(serial_orgate, 0)); + sysbus_connect_irq(s, 1, qdev_get_gpio_in(serial_orgate, 1)); + qdev_connect_gpio_out(DEVICE(serial_orgate), 0, slavio_irq[15]); + if (hwdef->apc_base) { apc_init(hwdef->apc_base, qemu_allocate_irq(cpu_halt_signal, NULL, 0)); } diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c index 5b2d20cb6a..03e33fc592 100644 --- a/hw/timer/slavio_timer.c +++ b/hw/timer/slavio_timer.c @@ -332,6 +332,10 @@ static const MemoryRegionOps slavio_timer_mem_ops = { .endianness = DEVICE_NATIVE_ENDIAN, .valid = { .min_access_size = 4, + .max_access_size = 8, + }, + .impl = { + .min_access_size = 4, .max_access_size = 4, }, }; |