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authorPeter Maydell2014-05-13 17:09:38 +0200
committerPeter Maydell2014-05-13 17:09:38 +0200
commit654039b42a7f0e7d1b719a17d5c388662950b9ab (patch)
tree1c0b021b8769725566c6c934406032addcbfdced /hw
parenttarget-arm/helper.c: Don't flush the TLB if SCTLR is rewritten unchanged (diff)
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hw/intc/allwinner-a10-pic: Add missing 'break'
Add missing 'break' after handling of AW_A10_PIC_BASE_ADDR write. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/intc/allwinner-a10-pic.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/hw/intc/allwinner-a10-pic.c b/hw/intc/allwinner-a10-pic.c
index bd29322609..de820b9723 100644
--- a/hw/intc/allwinner-a10-pic.c
+++ b/hw/intc/allwinner-a10-pic.c
@@ -97,6 +97,7 @@ static void aw_a10_pic_write(void *opaque, hwaddr offset, uint64_t value,
switch (offset) {
case AW_A10_PIC_BASE_ADDR:
s->base_addr = value & ~0x3;
+ break;
case AW_A10_PIC_PROTECT:
s->protect = value;
break;