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| author | Richard Henderson | 2022-10-01 18:22:56 +0200 |
|---|---|---|
| committer | Peter Maydell | 2022-10-10 15:52:25 +0200 |
| commit | 7fa7ea8f480cd6f3f5f2a9453eea5733510b6c8b (patch) | |
| tree | 4772971df5fd081a5495c0d7027faacfde250cf9 /hw | |
| parent | target/arm: Fix cacheattr in get_phys_addr_disabled (diff) | |
| download | qemu-7fa7ea8f480cd6f3f5f2a9453eea5733510b6c8b.tar.gz qemu-7fa7ea8f480cd6f3f5f2a9453eea5733510b6c8b.tar.xz qemu-7fa7ea8f480cd6f3f5f2a9453eea5733510b6c8b.zip | |
target/arm: Use tlb_set_page_full
Adjust GetPhysAddrResult to fill in CPUTLBEntryFull,
so that it may be passed directly to tlb_set_page_full.
The change is large, but mostly mechanical. The major
non-mechanical change is page_size -> lg_page_size.
Most of the time this is obvious, and is related to
TARGET_PAGE_BITS.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20221001162318.153420-21-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
0 files changed, 0 insertions, 0 deletions