diff options
| author | Philippe Mathieu-Daudé | 2019-06-25 00:28:41 +0200 |
|---|---|---|
| committer | Aleksandar Markovic | 2019-06-26 13:23:27 +0200 |
| commit | 8110b2bf7ed6a5ed17c6fdd6f67a546c77f13f0d (patch) | |
| tree | 1ceb0748b57acef9916bcb3e8927da83bbd30f90 /hw | |
| parent | hw/mips/gt64xxx_pci: Convert debug printf()s to trace events (diff) | |
| download | qemu-8110b2bf7ed6a5ed17c6fdd6f67a546c77f13f0d.tar.gz qemu-8110b2bf7ed6a5ed17c6fdd6f67a546c77f13f0d.tar.xz qemu-8110b2bf7ed6a5ed17c6fdd6f67a546c77f13f0d.zip | |
hw/mips/gt64xxx_pci: Align the pci0-mem size
One byte is missing, use an aligned size.
(qemu) info mtree
memory-region: pci0-mem
0000000000000000-00000000fffffffe (prio 0, i/o): pci0-mem
^
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <20190624222844.26584-8-f4bug@amsat.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/mips/gt64xxx_pci.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 815ef0711d..2fa313f498 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qemu/units.h" #include "qemu/log.h" #include "hw/hw.h" #include "hw/mips/mips.h" @@ -1201,7 +1202,7 @@ PCIBus *gt64120_register(qemu_irq *pic) dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE); d = GT64120_PCI_HOST_BRIDGE(dev); phb = PCI_HOST_BRIDGE(dev); - memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX); + memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", 4 * GiB); address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem"); phb->bus = pci_register_root_bus(dev, "pci", gt64120_pci_set_irq, gt64120_pci_map_irq, |