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| author | Peter Maydell | 2017-08-08 11:01:49 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-08-08 11:01:49 +0200 |
| commit | b4174c4b08a719e7df7e4f35c29f44b7c2517237 (patch) | |
| tree | fcfd296020160408d7caadc0ce477ddd28318cb7 /hw | |
| parent | hw/arm/virt: Add 2.10 machine type (diff) | |
| parent | cpu: add APIs to allocate/free CPU environment (diff) | |
| download | qemu-b4174c4b08a719e7df7e4f35c29f44b7c2517237.tar.gz qemu-b4174c4b08a719e7df7e4f35c29f44b7c2517237.tar.xz qemu-b4174c4b08a719e7df7e4f35c29f44b7c2517237.zip | |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio: fix for rc2
It turns out there's a way to setup SHPC on Q35: just put
a PCI to PCI bridge behind a DMI to PCI one. Our _OSC is
thus incorrect.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Mon 07 Aug 2017 22:39:20 BST
# gpg: using RSA key 0x281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>"
# gpg: aka "Michael S. Tsirkin <mst@redhat.com>"
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream:
cpu: add APIs to allocate/free CPU environment
hw/i386: allow SHPC for Q35 machine
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/i386/acpi-build.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b9c245c9bb..98dd424678 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -1862,9 +1862,9 @@ static Aml *build_q35_osc_method(void) /* * Always allow native PME, AER (no dependencies) - * Never allow SHPC (no SHPC controller in this system) + * Allow SHPC (PCI bridges can have SHPC controller) */ - aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1D), a_ctrl)); + aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1F), a_ctrl)); if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1)))); /* Unknown revision */ |