diff options
| author | Sai Pavan Boddu | 2020-05-12 16:54:51 +0200 |
|---|---|---|
| committer | Jason Wang | 2020-06-18 15:05:51 +0200 |
| commit | d48cb519b35010a90f18df915d187e566bf10c3e (patch) | |
| tree | 2e57556d9e305cb5984be3b74cd24101bb587643 /hw | |
| parent | net: cadence_gem: Add support for jumbo frames (diff) | |
| download | qemu-d48cb519b35010a90f18df915d187e566bf10c3e.tar.gz qemu-d48cb519b35010a90f18df915d187e566bf10c3e.tar.xz qemu-d48cb519b35010a90f18df915d187e566bf10c3e.zip | |
net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg
Advertise support of clear-on-read for ISR registers.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/net/cadence_gem.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c index 8e927ada73..2211550d2b 100644 --- a/hw/net/cadence_gem.c +++ b/hw/net/cadence_gem.c @@ -1371,7 +1371,7 @@ static void gem_reset(DeviceState *d) s->regs[GEM_TXPARTIALSF] = 0x000003ff; s->regs[GEM_RXPARTIALSF] = 0x000003ff; s->regs[GEM_MODID] = s->revision; - s->regs[GEM_DESCONF] = 0x02500111; + s->regs[GEM_DESCONF] = 0x02D00111; s->regs[GEM_DESCONF2] = 0x2ab10000 | s->jumbo_max_len; s->regs[GEM_DESCONF5] = 0x002f2045; s->regs[GEM_DESCONF6] = GEM_DESCONF6_64B_MASK; |