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author | Jean-Christophe Dubois | 2016-05-30 19:26:00 +0200 |
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committer | Jason Wang | 2016-06-02 04:42:46 +0200 |
commit | ff4b325f5e1d68cd089e71edcaa3fe3432ca18dc (patch) | |
tree | 59a956e44e7a44f95a80704cda43d1e6f28fc872 /hw | |
parent | i.MX: Fix FEC code for ECR register reset value. (diff) | |
download | qemu-ff4b325f5e1d68cd089e71edcaa3fe3432ca18dc.tar.gz qemu-ff4b325f5e1d68cd089e71edcaa3fe3432ca18dc.tar.xz qemu-ff4b325f5e1d68cd089e71edcaa3fe3432ca18dc.zip |
i.MX: reset TX/RX descriptors when FEC is disabled.
According to the FEC chapter of i.MX25 reference manual
RX adn TX descriptors are reseted when the FEC device is disabled through ECR.
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net>
Signed-off-by: Jason Wang <jasowang@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r-- | hw/net/imx_fec.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c index 768181e3c1..7369cfafe5 100644 --- a/hw/net/imx_fec.c +++ b/hw/net/imx_fec.c @@ -454,6 +454,8 @@ static void imx_fec_write(void *opaque, hwaddr addr, } if ((s->ecr & FEC_EN) == 0) { s->rx_enabled = 0; + s->rx_descriptor = s->erdsr; + s->tx_descriptor = s->etdsr; } break; case 0x040: /* MMFR */ |