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| author | Weiwei Li | 2022-02-11 05:39:15 +0100 |
|---|---|---|
| committer | Alistair Francis | 2022-03-03 04:14:50 +0100 |
| commit | 89ffdcec2722c92aac99d1c2bd547ac9b2ff0179 (patch) | |
| tree | c7845f3dfec3629753b238ad800d3f732124e66e /include/exec/cpu_ldst.h | |
| parent | hw: riscv: opentitan: fixup SPI addresses (diff) | |
| download | qemu-89ffdcec2722c92aac99d1c2bd547ac9b2ff0179.tar.gz qemu-89ffdcec2722c92aac99d1c2bd547ac9b2ff0179.tar.xz qemu-89ffdcec2722c92aac99d1c2bd547ac9b2ff0179.zip | |
target/riscv: add cfg properties for zfinx, zdinx and zhinx{min}
Co-authored-by: ardxwe <ardxwe@gmail.com>
Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn>
Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220211043920.28981-2-liweiwei@iscas.ac.cn>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Diffstat (limited to 'include/exec/cpu_ldst.h')
0 files changed, 0 insertions, 0 deletions