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| author | Peter Maydell | 2014-03-13 20:13:33 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-03-13 20:13:33 +0100 |
| commit | bbbd67f0ccdba93702e58879997c1d2ca67311b1 (patch) | |
| tree | d02c18e59ace36d7f8dcf01040b8f1218ad021b1 /include/exec/cputlb.h | |
| parent | Merge remote-tracking branch 'remotes/kraxel/tags/pull-input-6' into staging (diff) | |
| parent | user-exec: Change exception_action() argument to CPUState (diff) | |
| download | qemu-bbbd67f0ccdba93702e58879997c1d2ca67311b1.tar.gz qemu-bbbd67f0ccdba93702e58879997c1d2ca67311b1.tar.xz qemu-bbbd67f0ccdba93702e58879997c1d2ca67311b1.zip | |
Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-2.0' into staging
QOM CPUState refactorings / X86CPU
* Deadlock fix for exit requests around CPU reset
* X86CPU x2apic for KVM
* X86CPU model subclasses
* SPARCCPU preparations for model subclasses
* -cpu arguments for arm, cris, lm32, moxie, openrisc, ppc, sh4, uc32
* m68k assertion cleanups
* CPUClass hooks for cpu.h inline functions
* Field movements from CPU_COMMON to CPUState and follow-up cleanups
# gpg: Signature made Thu 13 Mar 2014 19:06:56 GMT using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg: aka "Andreas Färber <afaerber@suse.com>"
* remotes/afaerber/tags/qom-cpu-for-2.0: (58 commits)
user-exec: Change exception_action() argument to CPUState
cputlb: Change tlb_set_page() argument to CPUState
cputlb: Change tlb_flush() argument to CPUState
cputlb: Change tlb_flush_page() argument to CPUState
target-microblaze: Replace DisasContext::env field with MicroBlazeCPU
target-cris: Replace DisasContext::env field with CRISCPU
exec: Change cpu_abort() argument to CPUState
exec: Change memory_region_section_get_iotlb() argument to CPUState
cputlb: Change tlb_unprotect_code_phys() argument to CPUState
cpu-exec: Change cpu_resume_from_signal() argument to CPUState
exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argument
exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argument
target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook
translate-all: Change tb_flush_jmp_cache() argument to CPUState
translate-all: Change tb_gen_code() argument to CPUState
translate-all: Change cpu_io_recompile() argument to CPUState
translate-all: Change tb_check_watchpoint() argument to CPUState
translate-all: Change cpu_restore_state_from_tb() argument to CPUState
translate-all: Change cpu_restore_state() argument to CPUState
cpu-exec: Change cpu_loop_exit() argument to CPUState
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec/cputlb.h')
| -rw-r--r-- | include/exec/cputlb.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/exec/cputlb.h b/include/exec/cputlb.h index e21cb60442..b8ecd6f68d 100644 --- a/include/exec/cputlb.h +++ b/include/exec/cputlb.h @@ -22,7 +22,7 @@ #if !defined(CONFIG_USER_ONLY) /* cputlb.c */ void tlb_protect_code(ram_addr_t ram_addr); -void tlb_unprotect_code_phys(CPUArchState *env, ram_addr_t ram_addr, +void tlb_unprotect_code_phys(CPUState *cpu, ram_addr_t ram_addr, target_ulong vaddr); void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry, uintptr_t start, uintptr_t length); @@ -31,12 +31,12 @@ void tlb_set_dirty(CPUArchState *env, target_ulong vaddr); extern int tlb_flush_count; /* exec.c */ -void tb_flush_jmp_cache(CPUArchState *env, target_ulong addr); +void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr); MemoryRegionSection * address_space_translate_for_iotlb(AddressSpace *as, hwaddr addr, hwaddr *xlat, hwaddr *plen); -hwaddr memory_region_section_get_iotlb(CPUArchState *env, +hwaddr memory_region_section_get_iotlb(CPUState *cpu, MemoryRegionSection *section, target_ulong vaddr, hwaddr paddr, hwaddr xlat, |