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authorPeter Maydell2014-03-13 20:13:33 +0100
committerPeter Maydell2014-03-13 20:13:33 +0100
commitbbbd67f0ccdba93702e58879997c1d2ca67311b1 (patch)
treed02c18e59ace36d7f8dcf01040b8f1218ad021b1 /include/exec/exec-all.h
parentMerge remote-tracking branch 'remotes/kraxel/tags/pull-input-6' into staging (diff)
parentuser-exec: Change exception_action() argument to CPUState (diff)
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Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-2.0' into staging
QOM CPUState refactorings / X86CPU * Deadlock fix for exit requests around CPU reset * X86CPU x2apic for KVM * X86CPU model subclasses * SPARCCPU preparations for model subclasses * -cpu arguments for arm, cris, lm32, moxie, openrisc, ppc, sh4, uc32 * m68k assertion cleanups * CPUClass hooks for cpu.h inline functions * Field movements from CPU_COMMON to CPUState and follow-up cleanups # gpg: Signature made Thu 13 Mar 2014 19:06:56 GMT using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/qom-cpu-for-2.0: (58 commits) user-exec: Change exception_action() argument to CPUState cputlb: Change tlb_set_page() argument to CPUState cputlb: Change tlb_flush() argument to CPUState cputlb: Change tlb_flush_page() argument to CPUState target-microblaze: Replace DisasContext::env field with MicroBlazeCPU target-cris: Replace DisasContext::env field with CRISCPU exec: Change cpu_abort() argument to CPUState exec: Change memory_region_section_get_iotlb() argument to CPUState cputlb: Change tlb_unprotect_code_phys() argument to CPUState cpu-exec: Change cpu_resume_from_signal() argument to CPUState exec: Change cpu_breakpoint_{insert,remove{,_by_ref,_all}} argument exec: Change cpu_watchpoint_{insert,remove{,_by_ref,_all}} argument target-ppc: Use PowerPCCPU in PowerPCCPUClass::handle_mmu_fault hook translate-all: Change tb_flush_jmp_cache() argument to CPUState translate-all: Change tb_gen_code() argument to CPUState translate-all: Change cpu_io_recompile() argument to CPUState translate-all: Change tb_check_watchpoint() argument to CPUState translate-all: Change cpu_restore_state_from_tb() argument to CPUState translate-all: Change cpu_restore_state() argument to CPUState cpu-exec: Change cpu_loop_exit() argument to CPUState ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec/exec-all.h')
-rw-r--r--include/exec/exec-all.h43
1 files changed, 24 insertions, 19 deletions
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index a387922df4..502b7aa084 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -80,16 +80,16 @@ void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb,
void cpu_gen_init(void);
int cpu_gen_code(CPUArchState *env, struct TranslationBlock *tb,
int *gen_code_size_ptr);
-bool cpu_restore_state(CPUArchState *env, uintptr_t searched_pc);
+bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc);
void page_size_init(void);
-void QEMU_NORETURN cpu_resume_from_signal(CPUArchState *env1, void *puc);
-void QEMU_NORETURN cpu_io_recompile(CPUArchState *env, uintptr_t retaddr);
-TranslationBlock *tb_gen_code(CPUArchState *env,
+void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc);
+void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
+TranslationBlock *tb_gen_code(CPUState *cpu,
target_ulong pc, target_ulong cs_base, int flags,
int cflags);
void cpu_exec_init(CPUArchState *env);
-void QEMU_NORETURN cpu_loop_exit(CPUArchState *env1);
+void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);
int page_unprotect(target_ulong address, uintptr_t pc, void *puc);
void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access);
@@ -98,18 +98,18 @@ void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end,
#if !defined(CONFIG_USER_ONLY)
void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as);
/* cputlb.c */
-void tlb_flush_page(CPUArchState *env, target_ulong addr);
-void tlb_flush(CPUArchState *env, int flush_global);
-void tlb_set_page(CPUArchState *env, target_ulong vaddr,
+void tlb_flush_page(CPUState *cpu, target_ulong addr);
+void tlb_flush(CPUState *cpu, int flush_global);
+void tlb_set_page(CPUState *cpu, target_ulong vaddr,
hwaddr paddr, int prot,
int mmu_idx, target_ulong size);
void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr);
#else
-static inline void tlb_flush_page(CPUArchState *env, target_ulong addr)
+static inline void tlb_flush_page(CPUState *cpu, target_ulong addr)
{
}
-static inline void tlb_flush(CPUArchState *env, int flush_global)
+static inline void tlb_flush(CPUState *cpu, int flush_global)
{
}
#endif
@@ -332,7 +332,7 @@ bool io_mem_read(struct MemoryRegion *mr, hwaddr addr,
bool io_mem_write(struct MemoryRegion *mr, hwaddr addr,
uint64_t value, unsigned size);
-void tlb_fill(CPUArchState *env1, target_ulong addr, int is_write, int mmu_idx,
+void tlb_fill(CPUState *cpu, target_ulong addr, int is_write, int mmu_idx,
uintptr_t retaddr);
uint8_t helper_ldb_cmmu(CPUArchState *env, target_ulong addr, int mmu_idx);
@@ -380,20 +380,25 @@ extern int singlestep;
/* cpu-exec.c */
extern volatile sig_atomic_t exit_request;
-/* Deterministic execution requires that IO only be performed on the last
- instruction of a TB so that interrupts take effect immediately. */
-static inline int can_do_io(CPUArchState *env)
+/**
+ * cpu_can_do_io:
+ * @cpu: The CPU for which to check IO.
+ *
+ * Deterministic execution requires that IO only be performed on the last
+ * instruction of a TB so that interrupts take effect immediately.
+ *
+ * Returns: %true if memory-mapped IO is safe, %false otherwise.
+ */
+static inline bool cpu_can_do_io(CPUState *cpu)
{
- CPUState *cpu = ENV_GET_CPU(env);
-
if (!use_icount) {
- return 1;
+ return true;
}
/* If not executing code then assume we are ok. */
if (cpu->current_tb == NULL) {
- return 1;
+ return true;
}
- return env->can_do_io != 0;
+ return cpu->can_do_io != 0;
}
#endif