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| author | Pranith Kumar | 2017-09-04 16:21:56 +0200 |
|---|---|---|
| committer | Peter Maydell | 2017-09-04 18:13:53 +0200 |
| commit | 7229ec5825df6b933f150b54a8a2bedd2de1864c (patch) | |
| tree | fab8d4164ff9c0a73fdaad41ee06815d6163e504 /include/exec/memattrs.h | |
| parent | target/arm: Fix aa64 ldp register writeback (diff) | |
| download | qemu-7229ec5825df6b933f150b54a8a2bedd2de1864c.tar.gz qemu-7229ec5825df6b933f150b54a8a2bedd2de1864c.tar.xz qemu-7229ec5825df6b933f150b54a8a2bedd2de1864c.zip | |
arm_gicv3_kvm: Fix compile warning
Fix the following warning:
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: warning: logical not is only applied to the left hand side of this bitwise operator [-Wlogical-not-parentheses]
if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
^ ~
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: note: add parentheses after the '!' to evaluate the bitwise operator first
if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
^
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: note: add parentheses around left hand side expression to silence this warning
if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
^
This logic error meant we were not setting the PTZ
bit when we should -- luckily as the comment suggests
this wouldn't have had any effects beyond making GIC
initialization take a little longer.
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-id: 20170829173226.7625-1-bobby.prani@gmail.com
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec/memattrs.h')
0 files changed, 0 insertions, 0 deletions