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| author | Peter Maydell | 2018-08-24 14:17:43 +0200 |
|---|---|---|
| committer | Peter Maydell | 2018-08-24 14:17:43 +0200 |
| commit | 211e701d669e85f0e33ff6c4404a77519198f35e (patch) | |
| tree | 7e20fe794f0eb553e7ece5be9ed53b5ea71753a2 /include/exec/memory-internal.h | |
| parent | hw/misc/iotkit: Wire up the sysctl and sysinfo register blocks (diff) | |
| download | qemu-211e701d669e85f0e33ff6c4404a77519198f35e.tar.gz qemu-211e701d669e85f0e33ff6c4404a77519198f35e.tar.xz qemu-211e701d669e85f0e33ff6c4404a77519198f35e.zip | |
hw/misc/tz-msc: Model TrustZone Master Security Controller
Implement a model of the TrustZone Master Securtiy Controller,
as documented in the Arm CoreLink SIE-200 System IP for
Embedded TRM (DDI0571G):
https://developer.arm.com/products/architecture/m-profile/docs/ddi0571/g
The MSC is intended to sit in front of a device which can
be a bus master (eg a DMA controller) and programmably gate
its transactions. This allows a bus-mastering device to be
controlled by non-secure code but still restricted from
making accesses to addresses which are secure-only.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20180820141116.9118-12-peter.maydell@linaro.org
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/exec/memory-internal.h')
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