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| author | Max Filippov | 2016-11-12 10:15:07 +0100 |
|---|---|---|
| committer | Max Filippov | 2017-01-15 22:01:56 +0100 |
| commit | 4b37aaa879d508494df14bdc49830cdf8aa77a57 (patch) | |
| tree | 65b0d726aed37ae96c2bd0c5f46e12c26132b13e /include/exec/memory.h | |
| parent | target/xtensa: tests: add ccount write tests (diff) | |
| download | qemu-4b37aaa879d508494df14bdc49830cdf8aa77a57.tar.gz qemu-4b37aaa879d508494df14bdc49830cdf8aa77a57.tar.xz qemu-4b37aaa879d508494df14bdc49830cdf8aa77a57.zip | |
target/xtensa: fix ICACHE/DCACHE options detection
Configuration overlay does not explicitly say whether there are ICACHE
and DCACHE in the core. Current code uses XCHAL_[ID]CACHE_WAYS to detect
if corresponding cache option is enabled, but that's not correct: on
cores without cache these macros are defined as 1, not as 0.
Check XCHAL_[ID]CACHE_SIZE instead.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Diffstat (limited to 'include/exec/memory.h')
0 files changed, 0 insertions, 0 deletions