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| author | Laurent Vivier | 2017-01-13 19:36:33 +0100 |
|---|---|---|
| committer | Laurent Vivier | 2017-01-14 10:06:21 +0100 |
| commit | 727d937b59f1f722f983e20f9cd23b0e7ef60165 (patch) | |
| tree | 55e45a46b3a565b37798f8374c6cb763d3c2fb33 /include/exec/memory.h | |
| parent | target-m68k: CAS doesn't need aligned access (diff) | |
| download | qemu-727d937b59f1f722f983e20f9cd23b0e7ef60165.tar.gz qemu-727d937b59f1f722f983e20f9cd23b0e7ef60165.tar.xz qemu-727d937b59f1f722f983e20f9cd23b0e7ef60165.zip | |
target-m68k: increment/decrement with SP
On 680x0 family only.
Address Register indirect With postincrement:
When using the stack pointer (A7) with byte size data, the register
is incremented by two.
Address Register indirect With predecrement:
When using the stack pointer (A7) with byte size data, the register
is decremented by two.
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-Id: <1484332593-16782-6-git-send-email-laurent@vivier.eu>
Diffstat (limited to 'include/exec/memory.h')
0 files changed, 0 insertions, 0 deletions