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| author | Aurelien Jarno | 2013-11-06 19:51:21 +0100 |
|---|---|---|
| committer | Richard Henderson | 2014-01-26 00:19:19 +0100 |
| commit | 085bb5bb64069a16b843fca840f91cdfb3f40fda (patch) | |
| tree | bdb7fc514599ac98f8c0b189c46543498e31d091 /include/exec/spinlock.h | |
| parent | tcg/i386: add support for three-byte opcodes (diff) | |
| download | qemu-085bb5bb64069a16b843fca840f91cdfb3f40fda.tar.gz qemu-085bb5bb64069a16b843fca840f91cdfb3f40fda.tar.xz qemu-085bb5bb64069a16b843fca840f91cdfb3f40fda.zip | |
tcg/i386: use movbe instruction in qemu_ldst routines
The movbe instruction has been added on some Intel Atom CPUs and on
recent Intel Haswell CPUs. It allows to load/store a value and at the
same time bswap it.
This patch detects the avaibility of this instruction and when available
use it in the qemu load/store routines in replacement of load/store +
bswap. Note that for 16-bit unsigned loads, movbe + movzw is basically the
same as movzw + bswap, so the patch doesn't touch this case.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
[RTH: Reduced the number of conditionals using "movop".]
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'include/exec/spinlock.h')
0 files changed, 0 insertions, 0 deletions