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| author | Peter Maydell | 2018-03-13 16:34:50 +0100 |
|---|---|---|
| committer | Peter Maydell | 2018-03-19 19:23:24 +0100 |
| commit | 01e02f5aa74315f81b62872a50fe1b3e96dd00df (patch) | |
| tree | 06214e062a075dc15d5a024f9b4a7f7e436f3971 /include/exec | |
| parent | char: i.MX: Add support for "TX complete" interrupt (diff) | |
| download | qemu-01e02f5aa74315f81b62872a50fe1b3e96dd00df.tar.gz qemu-01e02f5aa74315f81b62872a50fe1b3e96dd00df.tar.xz qemu-01e02f5aa74315f81b62872a50fe1b3e96dd00df.zip | |
hw/arm/raspi: Don't do board-setup or secure-boot for raspi3
For the rpi1 and 2 we want to boot the Linux kernel via some
custom setup code that makes sure that the SMC instruction
acts as a no-op, because it's used for cache maintenance.
The rpi3 boots AArch64 kernels, which don't need SMC for
cache maintenance and always expect to be booted non-secure.
Don't fill in the aarch32-specific parts of the binfo struct.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180313153458.26822-2-peter.maydell@linaro.org
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions
