diff options
| author | Peter Maydell | 2020-06-26 17:55:20 +0200 |
|---|---|---|
| committer | Peter Maydell | 2020-06-26 17:55:20 +0200 |
| commit | 3591ddd39987cbdaa0cfa344a262f315abd97582 (patch) | |
| tree | 4adfc6f7c9ee3d650087d01f8732fe8d6bcca2c3 /include/exec | |
| parent | Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ... (diff) | |
| parent | i386: Mask SVM features if nested SVM is disabled (diff) | |
| download | qemu-3591ddd39987cbdaa0cfa344a262f315abd97582.tar.gz qemu-3591ddd39987cbdaa0cfa344a262f315abd97582.tar.xz qemu-3591ddd39987cbdaa0cfa344a262f315abd97582.zip | |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* Various fixes
* libdaxctl support to correctly align devdax character devices (Jingqi)
* initial-all-set support for live migration (Jay)
* forbid '-numa node, mem' for 5.1 and newer machine types (Igor)
* x87 fixes (Joseph)
* Tighten memory_region_access_valid (Michael) and fix fallout (myself)
* Replay fixes (Pavel)
# gpg: Signature made Fri 26 Jun 2020 14:42:17 BST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini/tags/for-upstream: (31 commits)
i386: Mask SVM features if nested SVM is disabled
ibex_uart: fix XOR-as-pow
vmport: move compat properties to hw_compat_5_0
hyperv: vmbus: Remove the 2nd IRQ
kvm: i386: allow TSC to differ by NTP correction bounds without TSC scaling
numa: forbid '-numa node, mem' for 5.1 and newer machine types
osdep: Make MIN/MAX evaluate arguments only once
target/i386: Add notes for versioned CPU models
target/i386: reimplement fpatan using floatx80 operations
target/i386: reimplement fyl2x using floatx80 operations
target/i386: reimplement fyl2xp1 using floatx80 operations
target/i386: reimplement fprem, fprem1 using floatx80 operations
softfloat: return low bits of quotient from floatx80_modrem
softfloat: do not set denominator high bit for floatx80 remainder
softfloat: do not return pseudo-denormal from floatx80 remainder
softfloat: fix floatx80 remainder pseudo-denormal check for zero
softfloat: merge floatx80_mod and floatx80_rem
target/i386: reimplement f2xm1 using floatx80 operations
xen: Actually fix build without passthrough
Makefile: Install qemu-[qmp/ga]-ref.* into the directory "interop"
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec')
| -rw-r--r-- | include/exec/cpu-all.h | 8 | ||||
| -rw-r--r-- | include/exec/cpu-defs.h | 7 |
2 files changed, 9 insertions, 6 deletions
diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index fb4e8a8e29..fc403d456b 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -176,11 +176,9 @@ extern unsigned long reserved_va; * avoid setting bits at the top of guest addresses that might need * to be used for tags. */ -#if MIN(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32 -# define GUEST_ADDR_MAX_ UINT32_MAX -#else -# define GUEST_ADDR_MAX_ (~0ul) -#endif +#define GUEST_ADDR_MAX_ \ + ((MIN_CONST(TARGET_VIRT_ADDR_SPACE_BITS, TARGET_ABI_BITS) <= 32) ? \ + UINT32_MAX : ~0ul) #define GUEST_ADDR_MAX (reserved_va ? reserved_va - 1 : GUEST_ADDR_MAX_) #else diff --git a/include/exec/cpu-defs.h b/include/exec/cpu-defs.h index 8c44abefa2..9185632337 100644 --- a/include/exec/cpu-defs.h +++ b/include/exec/cpu-defs.h @@ -102,8 +102,13 @@ typedef uint64_t target_ulong; * Skylake's Level-2 STLB has 16 1G entries. * Also, make sure we do not size the TLB past the guest's address space. */ -# define CPU_TLB_DYN_MAX_BITS \ +# ifdef TARGET_PAGE_BITS_VARY +# define CPU_TLB_DYN_MAX_BITS \ MIN(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) +# else +# define CPU_TLB_DYN_MAX_BITS \ + MIN_CONST(22, TARGET_VIRT_ADDR_SPACE_BITS - TARGET_PAGE_BITS) +# endif # endif typedef struct CPUTLBEntry { |
