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| author | David Gibson | 2018-04-13 06:54:34 +0200 |
|---|---|---|
| committer | David Gibson | 2018-04-27 10:05:23 +0200 |
| commit | 4550f6a5da691fa45e801f391e947ff4236d1fa6 (patch) | |
| tree | bce92f00bf9932145ab69360bc27aad4ca698a68 /include/exec | |
| parent | spapr: Support ibm,dynamic-memory-v2 property (diff) | |
| download | qemu-4550f6a5da691fa45e801f391e947ff4236d1fa6.tar.gz qemu-4550f6a5da691fa45e801f391e947ff4236d1fa6.tar.xz qemu-4550f6a5da691fa45e801f391e947ff4236d1fa6.zip | |
target/ppc: Don't bother with MSR_EP in cpu_ppc_set_papr()
cpu_ppc_set_papr() removes the EP and HV bits from the MSR mask. While
removing the HV bit makes sense (a cpu in PAPR mode should never be
emulated in hypervisor mode), the EP bit is just bizarre. Although it's
true that a papr mode guest shouldn't be able to change the exception
prefix, the MSR[EP] bit doesn't even exist on the cpus supported for PAPR
mode, so it's pointless to do anything with it here.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions