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| author | Peter Crosthwaite | 2015-05-15 04:23:01 +0200 |
|---|---|---|
| committer | Peter Maydell | 2015-05-18 17:41:09 +0200 |
| commit | 7729e1f4b3c670eca38cc0ee0d96c1177efbc1e3 (patch) | |
| tree | 7d0ad497b3924bf517ea54d3250d15257710a2fa /include/exec | |
| parent | arm: Introduce Xilinx ZynqMP SoC (diff) | |
| download | qemu-7729e1f4b3c670eca38cc0ee0d96c1177efbc1e3.tar.gz qemu-7729e1f4b3c670eca38cc0ee0d96c1177efbc1e3.tar.xz qemu-7729e1f4b3c670eca38cc0ee0d96c1177efbc1e3.zip | |
arm: xlnx-zynqmp: Add GIC
Add the GIC and connect IRQ outputs to the CPUs. The GIC regions are
under-decoded through a 64k address region so implement aliases
accordingly.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 5853189965728d676106d9e94e76b9bb87981cb5.1431381507.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions