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| author | Alistair Francis | 2014-03-10 15:56:28 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-03-10 15:56:28 +0100 |
| commit | 7c2cb42b5033a851aa2a81de8d8a9e75bb65c2b6 (patch) | |
| tree | f2236275aa8f52c97c66ec6f07fd628abd6b4f33 /include/exec | |
| parent | target-arm: Fix incorrect setting of E bit in CPSR (diff) | |
| download | qemu-7c2cb42b5033a851aa2a81de8d8a9e75bb65c2b6.tar.gz qemu-7c2cb42b5033a851aa2a81de8d8a9e75bb65c2b6.tar.xz qemu-7c2cb42b5033a851aa2a81de8d8a9e75bb65c2b6.zip | |
target-arm: Implements the ARM PMCCNTR register
This patch implements the ARM PMCCNTR register including
the disable and reset components of the PMCR register.
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Message-id: bbf405e1feaf352cf39d5db402c9efcbd0f57c78.1393459802.git.alistair.francis@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions