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| author | Peter Maydell | 2014-02-08 15:46:55 +0100 |
|---|---|---|
| committer | Peter Maydell | 2014-02-08 15:46:55 +0100 |
| commit | 8b12a0cfc1449b1a0768705e61df5235bf93160d (patch) | |
| tree | cb30279079174c9365d0b267f15ac353a338ff55 /include/exec | |
| parent | target-arm: A64: Implement SIMD 3-reg-same shift and saturate insns (diff) | |
| download | qemu-8b12a0cfc1449b1a0768705e61df5235bf93160d.tar.gz qemu-8b12a0cfc1449b1a0768705e61df5235bf93160d.tar.xz qemu-8b12a0cfc1449b1a0768705e61df5235bf93160d.zip | |
target-arm: A64: Implement remaining non-pairwise int SIMD 3-reg-same insns
Implement the SIMD 3-reg-same instructions where the size == 3 case
is reserved: SHADD, UHADD, SRHADD, URHADD, SHSUB, UHSUB, SMAX,
UMAX, SMIN, UMIN, SABD, UABD, SABA, UABA, MLA, MLS, MUL, PMUL,
SQRDMULH, SQDMULH. (None of these have scalar-3-same versions.)
This completes the non-pairwise integer instructions in this category.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions