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| author | Joel Stanley | 2019-07-01 18:26:15 +0200 |
|---|---|---|
| committer | Peter Maydell | 2019-07-01 18:28:59 +0200 |
| commit | 979672cf51533ac629b925fea096eb6bfe25261a (patch) | |
| tree | 8852f1cb1fc1925a41e68144bf054811dc14a8d6 /include/exec | |
| parent | aspeed: add a per SoC mapping for the memory space (diff) | |
| download | qemu-979672cf51533ac629b925fea096eb6bfe25261a.tar.gz qemu-979672cf51533ac629b925fea096eb6bfe25261a.tar.xz qemu-979672cf51533ac629b925fea096eb6bfe25261a.zip | |
hw: timer: Add ASPEED RTC device
The RTC is modeled to provide time and date functionality. It is
initialised at zero to match the hardware.
There is no modelling of the alarm functionality, which includes the IRQ
line. As there is no guest code to exercise this function that is
acceptable for now.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20190618165311.27066-4-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions