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| author | Peter Crosthwaite | 2013-07-10 06:22:21 +0200 |
|---|---|---|
| committer | Peter Maydell | 2013-07-15 18:13:51 +0200 |
| commit | 97ce8d61559b99492b4d389eba51a198e55b8455 (patch) | |
| tree | eebb5b45905a7c30f1c8c6e6b996e1a415e0c2c8 /include/exec | |
| parent | target-arm/helper.c: OMAP/StrongARM cp15 crn=0 cleanup (diff) | |
| download | qemu-97ce8d61559b99492b4d389eba51a198e55b8455.tar.gz qemu-97ce8d61559b99492b4d389eba51a198e55b8455.tar.xz qemu-97ce8d61559b99492b4d389eba51a198e55b8455.zip | |
target-arm/helper.c: Implement MIDR aliases
Unimplemented registers in the cp15, CRn=0, opc1=0, CRm=0 space default
to aliasing the MIDR register. Set all registers in the space to access
MIDR by default.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 6127846712b7ad2727354a4f5e1d809451f1e859.1373429432.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions