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| author | Mark Cave-Ayland | 2015-04-17 09:16:49 +0200 |
|---|---|---|
| committer | Peter Maydell | 2015-04-17 12:44:01 +0200 |
| commit | 993ebe4a0be9aa4e4821818a81fab00b1ab1a79a (patch) | |
| tree | e5bd6f8f53cc063d769fcd45390ba7e5ea21eb89 /include/exec | |
| parent | Update version for v2.3.0-rc3 release (diff) | |
| download | qemu-993ebe4a0be9aa4e4821818a81fab00b1ab1a79a.tar.gz qemu-993ebe4a0be9aa4e4821818a81fab00b1ab1a79a.tar.xz qemu-993ebe4a0be9aa4e4821818a81fab00b1ab1a79a.zip | |
target-ppc: don't invalidate msr MSR_HVB bit in cpu_post_load
The invalidation code introduced in commit 2360b works by inverting most bits
of env->msr to ensure that hreg_store_msr() will forcibly update the CPU env
state to reflect the new msr value post-migration. Unfortunately
hreg_store_msr() is called with alter_hv set to 0 which preserves the MSR_HVB
state from the CPU env which is now the opposite value to what it should be.
Ensure that we don't invalidate the msr MSR_HVB bit during cpu_post_load so
that the correct value is restored. This fixes suspend/resume for PPC64.
Reported-by: Stefan Berger <stefanb@linux.vnet.ibm.com>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Alexander Graf <agraf@suse.de>
Message-id: 1429255009-12751-1-git-send-email-mark.cave-ayland@ilande.co.uk
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/exec')
0 files changed, 0 insertions, 0 deletions